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Merge remote-tracking branch 'donghoonpark/cmake'

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This commit is contained in:
Valerio De Benedetto 2025-01-15 21:31:53 +01:00
commit d71ea71769
9 changed files with 659 additions and 566 deletions
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2
.clang-format
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@ -1,7 +1,7 @@
BasedOnStyle: LLVM
AccessModifierOffset: -4
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: None
AlignConsecutiveAssignments: false
AlignOperands: Align
AllowAllArgumentsOnNextLine: false
AllowAllConstructorInitializersOnNextLine: false

62
.github/workflows/ci.yml vendored
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@ -10,17 +10,67 @@ jobs:
steps:
- name: Clone repo
uses: actions/checkout@v2
- name: configure
run: |
cmake -S . -B build -DBUILD_TESTS=ON -DCMAKE_BUILD_TYPE=Debug
- name: build
run: |
mkdir build
cd build
cmake ..
make
./nanomodbus_tests
- name: Compile Arduino examples
cmake --build build --config Debug
- name: Compress Build Directory
run: tar -czf build.tar.gz build/
- name: Upload Build Artifact
uses: actions/upload-artifact@v3
with:
name: build
path: build.tar.gz
Embedded:
runs-on: ubuntu-latest
steps:
- name: Clone repo
uses: actions/checkout@v2
- name: Build Arduino examples
run: |
mkdir -p build
pushd build
curl -fsSL https://raw.githubusercontent.com/arduino/arduino-cli/master/install.sh | sh
popd
export PATH="build/bin:$PATH"
./examples/arduino/compile-examples.sh
- name: Install ARM dependencies
run: |
sudo apt update
sudo apt install -y cmake gcc-arm-none-eabi libnewlib-arm-none-eabi build-essential
- name: Build rp2040 examples
run: |
pushd examples/rp2040
git clone --depth=1 https://github.com/raspberrypi/pico-sdk.git
export PICO_SDK_PATH=$PWD/pico-sdk
cmake -S . -B build -DPICO_SDK_PATH=$PWD/pico-sdk
cmake --build build --config Debug
popd
- name: Build stm32 examples
run: |
pushd examples/stm32
cmake -S . -B build
cmake --build build --config Debug
popd
Test:
runs-on: ubuntu-latest
needs: Build # run after Build job
steps:
- uses: actions/checkout@v3
- name: Download Build Directory
uses: actions/download-artifact@v3
with:
name: build
- name: Extract Build Directory
run: |
mkdir -p build
tar -xzf build.tar.gz -C .
- name: List Build Files
run: ls -R .
- name: test
run: |
cd build
ctest

8
.vscode/settings.json vendored
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@ -1,10 +1,16 @@
{
"cmake.configureOnOpen": true,
"cmake.configureArgs": [
"-DBUILD_TESTS=ON",
"-DBUILD_EXAMPLES=ON"
],
"cmake.copyCompileCommands": "${workspaceFolder}/compile_commands.json",
"C_Cpp.intelliSenseEngine": "disabled",
"clangd.path": "clangd",
"editor.formatOnSave": true,
"editor.rulers": [120],
"editor.rulers": [
120
],
"[c]": {
"editor.defaultFormatter": "llvm-vs-code-extensions.vscode-clangd"
},

19
CMakeLists.txt
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@ -10,7 +10,16 @@ include_directories(tests examples/linux .)
# Define BUILD_SHARED_LIBS=ON to build a dynamic library instead
add_library(nanomodbus nanomodbus.c)
target_include_directories(nanomodbus PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
if(BUILD_EXAMPLES)
add_executable(client-tcp examples/linux/client-tcp.c)
target_link_libraries(client-tcp nanomodbus)
add_executable(server-tcp examples/linux/server-tcp.c)
target_link_libraries(server-tcp nanomodbus)
endif()
if(BUILD_TESTS)
add_executable(nanomodbus_tests nanomodbus.c tests/nanomodbus_tests.c)
target_link_libraries(nanomodbus_tests pthread)
@ -24,7 +33,9 @@ add_executable(multi_server_rtu nanomodbus.c tests/multi_server_rtu.c)
target_compile_definitions(multi_server_rtu PUBLIC NMBS_DEBUG)
target_link_libraries(multi_server_rtu pthread)
add_custom_target(tests DEPENDS nanomodbus_tests server_disabled client_disabled multi_server_rtu)
add_executable(client-tcp nanomodbus.c examples/linux/client-tcp.c)
add_executable(server-tcp nanomodbus.c examples/linux/server-tcp.c)
enable_testing()
add_test(NAME test_general COMMAND $<TARGET_FILE:nanomodbus_tests>)
add_test(NAME test_server_disabled COMMAND $<TARGET_FILE:server_disabled>)
add_test(NAME test_client_disabled COMMAND $<TARGET_FILE:client_disabled>)
add_test(NAME test_multi_server_rtu COMMAND $<TARGET_FILE:multi_server_rtu>)
endif()

22
README.md
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@ -96,8 +96,30 @@ int main(int argc, char* argv[]) {
## Installation
### Integrate source code to your project
Just copy `nanomodbus.c` and `nanomodbus.h` inside your application codebase.
### CMake project
nanomodbus supports library linking by using cmake.
```cmake
FetchContent_Declare(
nanomodbus
GIT_REPOSITORY https://github.com/debevv/nanoMODBUS
GIT_TAG master # or the version you want
GIT_SHALLOW TRUE
)
FetchContent_MakeAvailable(nanomodbus)
...
add_executable(your_program source_codes)
target_link_libraries(your_program nanomodbus)
```
## API reference
API reference is available in the repository's [GitHub Pages](https://debevv.github.io/nanoMODBUS/nanomodbus_8h.html).

4
examples/stm32/CMakeLists.txt
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@ -55,7 +55,7 @@ FetchContent_MakeAvailable(wizchip)
FetchContent_Declare(
nanomodbus
GIT_REPOSITORY https://github.com/debevv/nanoMODBUS
GIT_TAG v1.18.1
GIT_TAG master
GIT_SHALLOW TRUE
)
@ -67,6 +67,8 @@ endif ()
add_library(nanomodbus ${nanomodbus_SOURCE_DIR}/nanomodbus.c)
target_include_directories(nanomodbus PUBLIC ${nanomodbus_SOURCE_DIR})
# FetchContent_MakeAvailable(nanomodbus)
set(TARGET_NAMES modbus_rtu modbus_tcp)
foreach (TARGET_NAME ${TARGET_NAMES})

37
examples/stm32/FreeRTOSConfig.h
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@ -2,22 +2,23 @@
* FreeRTOS Kernel V10.4.1
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
@ -25,7 +26,6 @@
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
@ -63,7 +63,7 @@ extern uint32_t SystemCoreClock;
#define configMAX_PRIORITIES (5)
#endif
#define configMINIMAL_STACK_SIZE ((unsigned short) 50)
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 32 * 1024 ) )
#define configTOTAL_HEAP_SIZE (size_t)(32 * 1024)
#define configMAX_TASK_NAME_LEN (10)
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
@ -144,7 +144,12 @@ See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
#define configASSERT(x) \
if ((x) == 0) { \
taskDISABLE_INTERRUPTS(); \
for (;;) \
; \
}
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */

117
examples/stm32/bsp/blackpill/blackpill.c
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@ -3,19 +3,26 @@
*
* 1. System Clock Configuration:
* - External high-speed oscillator (HSE) enabled.
* - PLL is configured with source from HSE, PLLM = 25, PLLN = 336, PLLP = 4, PLLQ = 7.
* - PLL is configured with source from HSE, PLLM = 25, PLLN = 336, PLLP = 4,
* PLLQ = 7.
* - System clock (SYSCLK) sourced from PLL output at 84 MHz.
* - AHB clock (HCLK) running at SYSCLK.
* - APB1 clock (PCLK1) running at HCLK / 2 (42 MHz).
* - APB2 clock (PCLK2) running at HCLK.
*
* 2. GPIO Configuration:
* - GPIOC Pin 13: Configured as output (Push Pull), used for LED control, low frequency.
* - GPIOB Pin 7: Configured as input, no pull-up/pull-down, used as input for interrupts.
* - GPIOB Pin 6: Configured as open-drain output, low frequency, initially set high.
* - GPIOA Pin 15: Configured as output (Push Pull), used for NSS in SPI1 communication, very high frequency.
* - GPIOA Pins 9 (TX), 10 (RX): Configured as alternate function (AF7) for USART1 communication.
* - GPIOB Pins 3 (SCLK), 4 (MISO), 5 (MOSI): Configured as alternate function (AF5) for SPI1 communication.
* - GPIOC Pin 13: Configured as output (Push Pull), used for LED control,
* low frequency.
* - GPIOB Pin 7: Configured as input, no pull-up/pull-down, used as input
* for interrupts.
* - GPIOB Pin 6: Configured as open-drain output, low frequency, initially
* set high.
* - GPIOA Pin 15: Configured as output (Push Pull), used for NSS in SPI1
* communication, very high frequency.
* - GPIOA Pins 9 (TX), 10 (RX): Configured as alternate function (AF7) for
* USART1 communication.
* - GPIOB Pins 3 (SCLK), 4 (MISO), 5 (MOSI): Configured as alternate
* function (AF5) for SPI1 communication.
*
* 3. SPI1 Configuration:
* - Mode: Master.
@ -28,7 +35,8 @@
* - First Bit: MSB.
* - TI Mode: Disabled.
* - CRC Calculation: Disabled.
* - Pins: PB3 (SCLK), PB4 (MISO), PB5 (MOSI) configured as alternate function.
* - Pins: PB3 (SCLK), PB4 (MISO), PB5 (MOSI) configured as alternate
* function.
*
* 4. USART1 Configuration:
* - Baud Rate: 115200.
@ -41,20 +49,28 @@
* - Pins: PA9 (TX), PA10 (RX) configured as alternate function.
*
* 5. DMA Configuration:
* - DMA2_Stream3 (SPI1_TX): Used for SPI1 TX, configured for memory-to-peripheral, channel 3.
* - Memory increment enabled, peripheral increment disabled, normal mode, low priority.
* - DMA2_Stream3 (SPI1_TX): Used for SPI1 TX, configured for
* memory-to-peripheral, channel 3.
* - Memory increment enabled, peripheral increment disabled, normal mode,
* low priority.
* - Linked to SPI1_TX using __HAL_LINKDMA.
* - Interrupt priority level 0, enabled.
* - DMA2_Stream0 (SPI1_RX): Used for SPI1 RX, configured for peripheral-to-memory, channel 3.
* - Memory increment enabled, peripheral increment disabled, normal mode, high priority.
* - DMA2_Stream0 (SPI1_RX): Used for SPI1 RX, configured for
* peripheral-to-memory, channel 3.
* - Memory increment enabled, peripheral increment disabled, normal mode,
* high priority.
* - Linked to SPI1_RX using __HAL_LINKDMA.
* - Interrupt priority level 0, enabled.
* - DMA2_Stream7 (USART1_TX): Used for USART1 TX, configured for memory-to-peripheral, channel 4.
* - Memory increment enabled, peripheral increment disabled, normal mode, low priority.
* - DMA2_Stream7 (USART1_TX): Used for USART1 TX, configured for
* memory-to-peripheral, channel 4.
* - Memory increment enabled, peripheral increment disabled, normal mode,
* low priority.
* - Linked to USART1_TX using __HAL_LINKDMA.
* - Interrupt priority level 0, enabled.
* - DMA2_Stream2 (USART1_RX): Used for USART1 RX, configured for peripheral-to-memory, channel 4.
* - Memory increment enabled, peripheral increment disabled, normal mode, high priority.
* - DMA2_Stream2 (USART1_RX): Used for USART1 RX, configured for
* peripheral-to-memory, channel 4.
* - Memory increment enabled, peripheral increment disabled, normal mode,
* high priority.
* - Linked to USART1_RX using __HAL_LINKDMA.
* - Interrupt priority level 0, enabled.
*
@ -65,11 +81,13 @@
* - DMA2 clock enabled for DMA streams (used for SPI1 and USART1).
*
* 7. Interrupt Configuration:
* - DMA2_Stream3 (SPI1_TX), DMA2_Stream0 (SPI1_RX), DMA2_Stream7 (USART1_TX), DMA2_Stream2 (USART1_RX).
* - DMA2_Stream3 (SPI1_TX), DMA2_Stream0 (SPI1_RX), DMA2_Stream7
* (USART1_TX), DMA2_Stream2 (USART1_RX).
* - All configured with priority level 0 and interrupts enabled.
*
* 8. Error Handling:
* - Error_Handler function enters an infinite loop to indicate an error state.
* - Error_Handler function enters an infinite loop to indicate an error
* state.
*/
#include "blackpill/blackpill.h"
@ -90,8 +108,7 @@ UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_usart1_tx;
DMA_HandleTypeDef hdma_usart1_rx;
void BSP_Init(void)
{
void BSP_Init(void) {
// Initialize the HAL Library
HAL_Init();
@ -105,8 +122,7 @@ void BSP_Init(void)
MX_USART1_UART_Init();
}
void SystemClock_Config(void)
{
void SystemClock_Config(void) {
// System Clock Configuration Code
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
@ -123,8 +139,7 @@ void SystemClock_Config(void)
HAL_RCC_OscConfig(&RCC_OscInitStruct);
// Initialize the CPU, AHB, and APB buses clocks
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
@ -132,8 +147,7 @@ void SystemClock_Config(void)
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
}
static void MX_GPIO_Init(void)
{
static void MX_GPIO_Init(void) {
GPIO_InitTypeDef GPIO_InitStruct = {0};
// Enable GPIOC clock
@ -174,8 +188,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
static void MX_USART1_UART_Init(void)
{
static void MX_USART1_UART_Init(void) {
// USART1 initialization settings
__HAL_RCC_USART1_CLK_ENABLE();
@ -188,8 +201,7 @@ static void MX_USART1_UART_Init(void)
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
if (HAL_UART_Init(&huart1) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -205,19 +217,17 @@ static void MX_USART1_UART_Init(void)
// Enable GPIOA clock
__HAL_RCC_GPIOA_CLK_ENABLE();
// Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push Pull
// Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push
// Pull
GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
static void MX_SPI1_Init(void)
{
static void MX_SPI1_Init(void) {
__HAL_RCC_SPI1_CLK_ENABLE();
// SPI1 initialization settings
hspi1.Instance = SPI1;
@ -233,8 +243,7 @@ static void MX_SPI1_Init(void)
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; // Disable CRC calculation
hspi1.Init.CRCPolynomial = 10; // CRC polynomial value
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
if (HAL_SPI_Init(&hspi1) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -252,11 +261,9 @@ static void MX_SPI1_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
}
static void MX_DMA_Init(void)
{
static void MX_DMA_Init(void) {
// DMA controller clock enable
__HAL_RCC_DMA2_CLK_ENABLE();
@ -271,8 +278,7 @@ static void MX_DMA_Init(void)
hdma_spi1_tx.Init.Mode = DMA_NORMAL;
hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
{
if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -290,8 +296,7 @@ static void MX_DMA_Init(void)
hdma_spi1_rx.Init.Mode = DMA_NORMAL;
hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH;
hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
{
if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -309,8 +314,7 @@ static void MX_DMA_Init(void)
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
{
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -329,8 +333,7 @@ static void MX_DMA_Init(void)
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_HIGH;
hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
{
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) {
// Initialization error handling
Error_Handler();
}
@ -354,33 +357,27 @@ static void MX_DMA_Init(void)
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
}
void Error_Handler(void)
{
void Error_Handler(void) {
// If an error occurs, stay in infinite loop
while (1) {}
}
void DMA2_Stream3_IRQHandler(void)
{
void DMA2_Stream3_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_spi1_tx);
}
void DMA2_Stream0_IRQHandler(void)
{
void DMA2_Stream0_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_spi1_rx);
}
void DMA2_Stream7_IRQHandler(void)
{
void DMA2_Stream7_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_usart1_tx);
}
void DMA2_Stream2_IRQHandler(void)
{
void DMA2_Stream2_IRQHandler(void) {
HAL_DMA_IRQHandler(&hdma_usart1_rx);
}
void USART1_IRQHandler(void)
{
void USART1_IRQHandler(void) {
HAL_UART_IRQHandler(&huart1);
}

24
examples/stm32/stm32f4xx_hal_conf.h
View File

@ -86,9 +86,10 @@
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
* @brief Adjust the value of External High Speed oscillator (HSE) used in your
* application. This value is used by the RCC HAL module to compute the system
* frequency (when HSE is used as system clock source, directly or through the
* PLL).
*/
#if !defined(HSE_VALUE)
#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
@ -100,8 +101,9 @@
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
* This value is used by the RCC HAL module to compute the system
* frequency (when HSI is used as system clock source, directly or through the
* PLL).
*/
#if !defined(HSI_VALUE)
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
@ -112,9 +114,9 @@
*/
#if !defined(LSI_VALUE)
#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz \
The real value may vary depending on the \
variations in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
*/
@ -128,8 +130,8 @@
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
* This value is used by the I2S HAL module to compute the I2S clock
* source frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined(EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
@ -484,12 +486,10 @@
#define assert_param(expr) ((void) 0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/