Merge remote-tracking branch 'donghoonpark/cmake'

.clang-format

@@ -1,7 +1,7 @@
 BasedOnStyle: LLVM
 AccessModifierOffset: -4
 AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: None
+AlignConsecutiveAssignments: false
 AlignOperands: Align
 AllowAllArgumentsOnNextLine: false
 AllowAllConstructorInitializersOnNextLine: false

.github/workflows/ci.yml

@@ -10,17 +10,67 @@ jobs:
     steps:
       - name: Clone repo
         uses: actions/checkout@v2
+      - name: configure
+        run: |
+          cmake -S . -B build -DBUILD_TESTS=ON -DCMAKE_BUILD_TYPE=Debug
       - name: build
         run: |
-          mkdir build
+          cmake --build build --config Debug
-          cd build
+      - name: Compress Build Directory
-          cmake ..
+        run: tar -czf build.tar.gz build/
-          make
+      - name: Upload Build Artifact
-          ./nanomodbus_tests
+        uses: actions/upload-artifact@v3
-      - name: Compile Arduino examples
+        with:
+          name: build
+          path: build.tar.gz
+  Embedded:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Clone repo
+        uses: actions/checkout@v2
+      - name: Build Arduino examples
         run: |
+          mkdir -p build
           pushd build
           curl -fsSL https://raw.githubusercontent.com/arduino/arduino-cli/master/install.sh | sh
           popd
           export PATH="build/bin:$PATH"
           ./examples/arduino/compile-examples.sh
+      - name: Install ARM dependencies
+        run: |
+          sudo apt update
+          sudo apt install -y cmake gcc-arm-none-eabi libnewlib-arm-none-eabi build-essential
+      - name: Build rp2040 examples
+        run: |
+          pushd examples/rp2040
+          git clone --depth=1 https://github.com/raspberrypi/pico-sdk.git
+          export PICO_SDK_PATH=$PWD/pico-sdk
+          cmake -S . -B build -DPICO_SDK_PATH=$PWD/pico-sdk
+          cmake --build build --config Debug
+          popd
+      - name: Build stm32 examples
+        run: |
+          pushd examples/stm32
+          cmake -S . -B build
+          cmake --build build --config Debug
+          popd
+  Test:
+    runs-on: ubuntu-latest
+    needs: Build  # run after Build job
+    steps:
+      - uses: actions/checkout@v3
+      - name: Download Build Directory
+        uses: actions/download-artifact@v3
+        with:
+          name: build  
+      - name: Extract Build Directory
+        run: |
+          mkdir -p build
+          tar -xzf build.tar.gz -C .
+      - name: List Build Files
+        run: ls -R .  
+      - name: test
+        run: |
+          cd build
+          ctest
+

.vscode/settings.json

@@ -1,10 +1,16 @@
 {
   "cmake.configureOnOpen": true,
+  "cmake.configureArgs": [
+    "-DBUILD_TESTS=ON",
+    "-DBUILD_EXAMPLES=ON"
+  ],
   "cmake.copyCompileCommands": "${workspaceFolder}/compile_commands.json",
   "C_Cpp.intelliSenseEngine": "disabled",
   "clangd.path": "clangd",
   "editor.formatOnSave": true,
-  "editor.rulers": [120],
+  "editor.rulers": [
+    120
+  ],
   "[c]": {
     "editor.defaultFormatter": "llvm-vs-code-extensions.vscode-clangd"
   },

CMakeLists.txt

@@ -10,21 +10,32 @@ include_directories(tests examples/linux .)
 
 # Define BUILD_SHARED_LIBS=ON to build a dynamic library instead
 add_library(nanomodbus nanomodbus.c)
+target_include_directories(nanomodbus PUBLIC ${CMAKE_CURRENT_SOURCE_DIR})
 
-add_executable(nanomodbus_tests nanomodbus.c tests/nanomodbus_tests.c)
+if(BUILD_EXAMPLES)
-target_link_libraries(nanomodbus_tests pthread)
+    add_executable(client-tcp examples/linux/client-tcp.c)
+    target_link_libraries(client-tcp nanomodbus)
+    add_executable(server-tcp examples/linux/server-tcp.c)
+    target_link_libraries(server-tcp nanomodbus)
+endif()
 
-add_executable(server_disabled nanomodbus.c tests/server_disabled.c)
+if(BUILD_TESTS)
-target_compile_definitions(server_disabled PUBLIC NMBS_SERVER_DISABLED)
+    add_executable(nanomodbus_tests nanomodbus.c tests/nanomodbus_tests.c)
+    target_link_libraries(nanomodbus_tests pthread)
 
-add_executable(client_disabled nanomodbus.c tests/client_disabled.c)
+    add_executable(server_disabled nanomodbus.c tests/server_disabled.c)
-target_compile_definitions(client_disabled PUBLIC NMBS_CLIENT_DISABLED)
+    target_compile_definitions(server_disabled PUBLIC NMBS_SERVER_DISABLED)
 
-add_executable(multi_server_rtu nanomodbus.c tests/multi_server_rtu.c)
+    add_executable(client_disabled nanomodbus.c tests/client_disabled.c)
-target_compile_definitions(multi_server_rtu PUBLIC NMBS_DEBUG)
+    target_compile_definitions(client_disabled PUBLIC NMBS_CLIENT_DISABLED)
-target_link_libraries(multi_server_rtu pthread)
 
-add_custom_target(tests DEPENDS nanomodbus_tests server_disabled client_disabled multi_server_rtu)
+    add_executable(multi_server_rtu nanomodbus.c tests/multi_server_rtu.c)
+    target_compile_definitions(multi_server_rtu PUBLIC NMBS_DEBUG)
+    target_link_libraries(multi_server_rtu pthread)
 
-add_executable(client-tcp nanomodbus.c examples/linux/client-tcp.c)
+    enable_testing()
-add_executable(server-tcp nanomodbus.c examples/linux/server-tcp.c)
+    add_test(NAME test_general COMMAND $<TARGET_FILE:nanomodbus_tests>)
+    add_test(NAME test_server_disabled COMMAND $<TARGET_FILE:server_disabled>)
+    add_test(NAME test_client_disabled COMMAND $<TARGET_FILE:client_disabled>)
+    add_test(NAME test_multi_server_rtu COMMAND $<TARGET_FILE:multi_server_rtu>)
+endif()

README.md

@@ -96,8 +96,30 @@ int main(int argc, char* argv[]) {
 
 ## Installation
 
+### Integrate source code to your project
+
 Just copy `nanomodbus.c` and `nanomodbus.h` inside your application codebase.
 
+### CMake project
+
+nanomodbus supports library linking by using cmake.
+
+```cmake
+FetchContent_Declare(
+        nanomodbus
+        GIT_REPOSITORY https://github.com/debevv/nanoMODBUS
+        GIT_TAG master # or the version you want
+        GIT_SHALLOW TRUE
+)
+
+FetchContent_MakeAvailable(nanomodbus)
+
+...
+
+add_executable(your_program source_codes)
+target_link_libraries(your_program nanomodbus)
+```
+
 ## API reference
 
 API reference is available in the repository's [GitHub Pages](https://debevv.github.io/nanoMODBUS/nanomodbus_8h.html).

examples/stm32/CMakeLists.txt

@@ -55,7 +55,7 @@ FetchContent_MakeAvailable(wizchip)
 FetchContent_Declare(
         nanomodbus
         GIT_REPOSITORY https://github.com/debevv/nanoMODBUS
-        GIT_TAG v1.18.1
+        GIT_TAG master
         GIT_SHALLOW TRUE
 )
 
@@ -67,6 +67,8 @@ endif ()
 add_library(nanomodbus ${nanomodbus_SOURCE_DIR}/nanomodbus.c)
 target_include_directories(nanomodbus PUBLIC ${nanomodbus_SOURCE_DIR})
 
+# FetchContent_MakeAvailable(nanomodbus)
+
 set(TARGET_NAMES modbus_rtu modbus_tcp)
 
 foreach (TARGET_NAME ${TARGET_NAMES})

examples/stm32/FreeRTOSConfig.h

@@ -2,22 +2,23 @@
  * FreeRTOS Kernel V10.4.1
  * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
- * this software and associated documentation files (the "Software"), to deal in
+ * of this software and associated documentation files (the "Software"), to deal
- * the Software without restriction, including without limitation the rights to
+ * in the Software without restriction, including without limitation the rights
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * the Software, and to permit persons to whom the Software is furnished to do so,
+ * copies of the Software, and to permit persons to whom the Software is
- * subject to the following conditions:
+ * furnished to do so, subject to the following conditions:
  *
- * The above copyright notice and this permission notice shall be included in all
+ * The above copyright notice and this permission notice shall be included in
- * copies or substantial portions of the Software.
+ * all copies or substantial portions of the Software.
  *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
  *
  * http://www.FreeRTOS.org
  * http://aws.amazon.com/freertos
@@ -25,7 +26,6 @@
  * 1 tab == 4 spaces!
  */
 
-
 #ifndef FREERTOS_CONFIG_H
 #define FREERTOS_CONFIG_H
 
@@ -45,26 +45,26 @@
 extern uint32_t SystemCoreClock;
 
 #if defined STM32L5
-	#define configENABLE_TRUSTZONE                   0
+#define configENABLE_TRUSTZONE 0
-	#if configENABLE_TRUSTZONE
+#if configENABLE_TRUSTZONE
-		#define configMINIMAL_SECURE_STACK_SIZE          ((uint16_t)1024)
+#define configMINIMAL_SECURE_STACK_SIZE ((uint16_t) 1024)
-	#endif
+#endif
-	#define configRUN_FREERTOS_SECURE_ONLY           0
+#define configRUN_FREERTOS_SECURE_ONLY 0
-	#define configENABLE_FPU                         1
+#define configENABLE_FPU 1
-	#define configENABLE_MPU                         0
+#define configENABLE_MPU 0
 #endif
 
 #define configUSE_PREEMPTION 1
 #define configUSE_IDLE_HOOK 0
 #define configUSE_TICK_HOOK 0
-#define configCPU_CLOCK_HZ				( SystemCoreClock )
+#define configCPU_CLOCK_HZ (SystemCoreClock)
-#define configTICK_RATE_HZ				( ( TickType_t ) 1000 )
+#define configTICK_RATE_HZ ((TickType_t) 1000)
 #if !defined USE_CMSIS_RTOS_V2
-#define configMAX_PRIORITIES			( 5 )
+#define configMAX_PRIORITIES (5)
 #endif
-#define configMINIMAL_STACK_SIZE		( ( unsigned short ) 50 )
+#define configMINIMAL_STACK_SIZE ((unsigned short) 50)
-#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 32 * 1024 ) )
+#define configTOTAL_HEAP_SIZE (size_t)(32 * 1024)
-#define configMAX_TASK_NAME_LEN			( 10 )
+#define configMAX_TASK_NAME_LEN (10)
 #define configUSE_TRACE_FACILITY 1
 #define configUSE_16_BIT_TICKS 0
 #define configIDLE_SHOULD_YIELD 1
@@ -79,13 +79,13 @@ extern uint32_t SystemCoreClock;
 
 /* Co-routine definitions. */
 #define configUSE_CO_ROUTINES 0
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+#define configMAX_CO_ROUTINE_PRIORITIES (2)
 
 /* Software timer definitions. */
 #define configUSE_TIMERS 1
-#define configTIMER_TASK_PRIORITY		( 2 )
+#define configTIMER_TASK_PRIORITY (2)
 #define configTIMER_QUEUE_LENGTH 10
-#define configTIMER_TASK_STACK_DEPTH	( configMINIMAL_STACK_SIZE * 2 )
+#define configTIMER_TASK_STACK_DEPTH (configMINIMAL_STACK_SIZE * 2)
 
 /* Set the following definitions to 1 to include the API function, or zero
 to exclude the API function. */
@@ -119,10 +119,10 @@ to exclude the API function. */
 
 /* Cortex-M specific definitions. */
 #ifdef __NVIC_PRIO_BITS
-	/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
-	#define configPRIO_BITS       		__NVIC_PRIO_BITS
+#define configPRIO_BITS __NVIC_PRIO_BITS
 #else
-	#define configPRIO_BITS       		4        /* 15 priority levels */
+#define configPRIO_BITS 4 /* 15 priority levels */
 #endif
 
 /* The lowest interrupt priority that can be used in a call to a "set priority"
@@ -137,14 +137,19 @@ PRIORITY THAN THIS! (higher priorities are lower numeric values. */
 
 /* Interrupt priorities used by the kernel port layer itself.  These are generic
 to all Cortex-M ports, and do not rely on any particular library functions. */
-#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
 /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
 See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
 
 /* Normal assert() semantics without relying on the provision of an assert.h
 header file. */
-#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }	
+#define configASSERT(x)                                                                                                \
+    if ((x) == 0) {                                                                                                    \
+        taskDISABLE_INTERRUPTS();                                                                                      \
+        for (;;)                                                                                                       \
+            ;                                                                                                          \
+    }
 
 /* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
 standard names. */

examples/stm32/bsp/blackpill/blackpill.c

@@ -3,19 +3,26 @@
  *
  * 1. System Clock Configuration:
  *    - External high-speed oscillator (HSE) enabled.
- *    - PLL is configured with source from HSE, PLLM = 25, PLLN = 336, PLLP = 4, PLLQ = 7.
+ *    - PLL is configured with source from HSE, PLLM = 25, PLLN = 336, PLLP = 4,
+ * PLLQ = 7.
  *    - System clock (SYSCLK) sourced from PLL output at 84 MHz.
  *    - AHB clock (HCLK) running at SYSCLK.
  *    - APB1 clock (PCLK1) running at HCLK / 2 (42 MHz).
  *    - APB2 clock (PCLK2) running at HCLK.
  *
  * 2. GPIO Configuration:
- *    - GPIOC Pin 13: Configured as output (Push Pull), used for LED control, low frequency.
+ *    - GPIOC Pin 13: Configured as output (Push Pull), used for LED control,
- *    - GPIOB Pin 7: Configured as input, no pull-up/pull-down, used as input for interrupts.
+ * low frequency.
- *    - GPIOB Pin 6: Configured as open-drain output, low frequency, initially set high.
+ *    - GPIOB Pin 7: Configured as input, no pull-up/pull-down, used as input
- *    - GPIOA Pin 15: Configured as output (Push Pull), used for NSS in SPI1 communication, very high frequency.
+ * for interrupts.
- *    - GPIOA Pins 9 (TX), 10 (RX): Configured as alternate function (AF7) for USART1 communication.
+ *    - GPIOB Pin 6: Configured as open-drain output, low frequency, initially
- *    - GPIOB Pins 3 (SCLK), 4 (MISO), 5 (MOSI): Configured as alternate function (AF5) for SPI1 communication.
+ * set high.
+ *    - GPIOA Pin 15: Configured as output (Push Pull), used for NSS in SPI1
+ * communication, very high frequency.
+ *    - GPIOA Pins 9 (TX), 10 (RX): Configured as alternate function (AF7) for
+ * USART1 communication.
+ *    - GPIOB Pins 3 (SCLK), 4 (MISO), 5 (MOSI): Configured as alternate
+ * function (AF5) for SPI1 communication.
  *
  * 3. SPI1 Configuration:
  *    - Mode: Master.
@@ -28,7 +35,8 @@
  *    - First Bit: MSB.
  *    - TI Mode: Disabled.
  *    - CRC Calculation: Disabled.
- *    - Pins: PB3 (SCLK), PB4 (MISO), PB5 (MOSI) configured as alternate function.
+ *    - Pins: PB3 (SCLK), PB4 (MISO), PB5 (MOSI) configured as alternate
+ * function.
  *
  * 4. USART1 Configuration:
  *    - Baud Rate: 115200.
@@ -41,20 +49,28 @@
  *    - Pins: PA9 (TX), PA10 (RX) configured as alternate function.
  *
  * 5. DMA Configuration:
- *    - DMA2_Stream3 (SPI1_TX): Used for SPI1 TX, configured for memory-to-peripheral, channel 3.
+ *    - DMA2_Stream3 (SPI1_TX): Used for SPI1 TX, configured for
- *      - Memory increment enabled, peripheral increment disabled, normal mode, low priority.
+ * memory-to-peripheral, channel 3.
+ *      - Memory increment enabled, peripheral increment disabled, normal mode,
+ * low priority.
  *      - Linked to SPI1_TX using __HAL_LINKDMA.
  *      - Interrupt priority level 0, enabled.
- *    - DMA2_Stream0 (SPI1_RX): Used for SPI1 RX, configured for peripheral-to-memory, channel 3.
+ *    - DMA2_Stream0 (SPI1_RX): Used for SPI1 RX, configured for
- *      - Memory increment enabled, peripheral increment disabled, normal mode, high priority.
+ * peripheral-to-memory, channel 3.
+ *      - Memory increment enabled, peripheral increment disabled, normal mode,
+ * high priority.
  *      - Linked to SPI1_RX using __HAL_LINKDMA.
  *      - Interrupt priority level 0, enabled.
- *    - DMA2_Stream7 (USART1_TX): Used for USART1 TX, configured for memory-to-peripheral, channel 4.
+ *    - DMA2_Stream7 (USART1_TX): Used for USART1 TX, configured for
- *      - Memory increment enabled, peripheral increment disabled, normal mode, low priority.
+ * memory-to-peripheral, channel 4.
+ *      - Memory increment enabled, peripheral increment disabled, normal mode,
+ * low priority.
  *      - Linked to USART1_TX using __HAL_LINKDMA.
  *      - Interrupt priority level 0, enabled.
- *    - DMA2_Stream2 (USART1_RX): Used for USART1 RX, configured for peripheral-to-memory, channel 4.
+ *    - DMA2_Stream2 (USART1_RX): Used for USART1 RX, configured for
- *      - Memory increment enabled, peripheral increment disabled, normal mode, high priority.
+ * peripheral-to-memory, channel 4.
+ *      - Memory increment enabled, peripheral increment disabled, normal mode,
+ * high priority.
  *      - Linked to USART1_RX using __HAL_LINKDMA.
  *      - Interrupt priority level 0, enabled.
  *
@@ -65,11 +81,13 @@
  *    - DMA2 clock enabled for DMA streams (used for SPI1 and USART1).
  *
  * 7. Interrupt Configuration:
- *    - DMA2_Stream3 (SPI1_TX), DMA2_Stream0 (SPI1_RX), DMA2_Stream7 (USART1_TX), DMA2_Stream2 (USART1_RX).
+ *    - DMA2_Stream3 (SPI1_TX), DMA2_Stream0 (SPI1_RX), DMA2_Stream7
+ * (USART1_TX), DMA2_Stream2 (USART1_RX).
  *    - All configured with priority level 0 and interrupts enabled.
  *
  * 8. Error Handling:
- *    - Error_Handler function enters an infinite loop to indicate an error state.
+ *    - Error_Handler function enters an infinite loop to indicate an error
+ * state.
  */
 
 #include "blackpill/blackpill.h"
@@ -90,8 +108,7 @@ UART_HandleTypeDef huart1;
 DMA_HandleTypeDef hdma_usart1_tx;
 DMA_HandleTypeDef hdma_usart1_rx;
 
-void BSP_Init(void)
+void BSP_Init(void) {
-{
     // Initialize the HAL Library
     HAL_Init();
 
@@ -105,8 +122,7 @@ void BSP_Init(void)
     MX_USART1_UART_Init();
 }
 
-void SystemClock_Config(void)
+void SystemClock_Config(void) {
-{
     // System Clock Configuration Code
     RCC_OscInitTypeDef RCC_OscInitStruct = {0};
     RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
@@ -123,8 +139,7 @@ void SystemClock_Config(void)
     HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
     // Initialize the CPU, AHB, and APB buses clocks
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
     RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
     RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
     RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
@@ -132,8 +147,7 @@ void SystemClock_Config(void)
     HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
 }
 
-static void MX_GPIO_Init(void)
+static void MX_GPIO_Init(void) {
-{
     GPIO_InitTypeDef GPIO_InitStruct = {0};
 
     // Enable GPIOC clock
@@ -174,8 +188,7 @@ static void MX_GPIO_Init(void)
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 }
 
-static void MX_USART1_UART_Init(void)
+static void MX_USART1_UART_Init(void) {
-{
     // USART1 initialization settings
     __HAL_RCC_USART1_CLK_ENABLE();
 
@@ -188,8 +201,7 @@ static void MX_USART1_UART_Init(void)
     huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
     huart1.Init.OverSampling = UART_OVERSAMPLING_16;
 
-  if (HAL_UART_Init(&huart1) != HAL_OK)
+    if (HAL_UART_Init(&huart1) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -205,19 +217,17 @@ static void MX_USART1_UART_Init(void)
     // Enable GPIOA clock
     __HAL_RCC_GPIOA_CLK_ENABLE();
 
-  // Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push Pull
+    // Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push
+    // Pull
     GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10;
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
     GPIO_InitStruct.Pull = GPIO_NOPULL;
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-
 }
 
-static void MX_SPI1_Init(void)
+static void MX_SPI1_Init(void) {
-{
     __HAL_RCC_SPI1_CLK_ENABLE();
     // SPI1 initialization settings
     hspi1.Instance = SPI1;
@@ -233,8 +243,7 @@ static void MX_SPI1_Init(void)
     hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;    // Disable CRC calculation
     hspi1.Init.CRCPolynomial = 10;                             // CRC polynomial value
 
-  if (HAL_SPI_Init(&hspi1) != HAL_OK)
+    if (HAL_SPI_Init(&hspi1) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -252,11 +261,9 @@ static void MX_SPI1_Init(void)
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
     GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
     HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-  
 }
 
-static void MX_DMA_Init(void)
+static void MX_DMA_Init(void) {
-{
     // DMA controller clock enable
     __HAL_RCC_DMA2_CLK_ENABLE();
 
@@ -271,8 +278,7 @@ static void MX_DMA_Init(void)
     hdma_spi1_tx.Init.Mode = DMA_NORMAL;
     hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW;
     hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
-  if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK)
+    if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -290,8 +296,7 @@ static void MX_DMA_Init(void)
     hdma_spi1_rx.Init.Mode = DMA_NORMAL;
     hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH;
     hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
-  if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK)
+    if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -309,8 +314,7 @@ static void MX_DMA_Init(void)
     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
     hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
     hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
-  if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
+    if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -329,8 +333,7 @@ static void MX_DMA_Init(void)
     hdma_usart1_rx.Init.Priority = DMA_PRIORITY_HIGH;
     hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
 
-  if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
+    if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) {
-  {
         // Initialization error handling
         Error_Handler();
     }
@@ -354,33 +357,27 @@ static void MX_DMA_Init(void)
     HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
 }
 
-void Error_Handler(void)
+void Error_Handler(void) {
-{
     // If an error occurs, stay in infinite loop
-  while(1) {}
+    while (1) {}
 }
 
-void DMA2_Stream3_IRQHandler(void)
+void DMA2_Stream3_IRQHandler(void) {
-{
     HAL_DMA_IRQHandler(&hdma_spi1_tx);
 }
 
-void DMA2_Stream0_IRQHandler(void)
+void DMA2_Stream0_IRQHandler(void) {
-{
     HAL_DMA_IRQHandler(&hdma_spi1_rx);
 }
 
-void DMA2_Stream7_IRQHandler(void)
+void DMA2_Stream7_IRQHandler(void) {
-{
     HAL_DMA_IRQHandler(&hdma_usart1_tx);
 }
 
-void DMA2_Stream2_IRQHandler(void)
+void DMA2_Stream2_IRQHandler(void) {
-{
     HAL_DMA_IRQHandler(&hdma_usart1_rx);
 }
 
-void USART1_IRQHandler(void)
+void USART1_IRQHandler(void) {
-{
     HAL_UART_IRQHandler(&huart1);
 }

examples/stm32/stm32f4xx_hal_conf.h

@@ -24,7 +24,7 @@
 #define __STM32F4xx_HAL_CONF_H
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Exported types ------------------------------------------------------------*/
@@ -86,53 +86,55 @@
 
 /* ########################## HSE/HSI Values adaptation ##################### */
 /**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your
-  *        This value is used by the RCC HAL module to compute the system frequency
+ * application. This value is used by the RCC HAL module to compute the system
-  *        (when HSE is used as system clock source, directly or through the PLL).  
+ * frequency (when HSE is used as system clock source, directly or through the
+ * PLL).
  */
-#if !defined  (HSE_VALUE) 
+#if !defined(HSE_VALUE)
-  #define HSE_VALUE              25000000U /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE 25000000U /*!< Value of the External oscillator in Hz */
 #endif                      /* HSE_VALUE */
 
-#if !defined  (HSE_STARTUP_TIMEOUT)
+#if !defined(HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    100U      /*!< Time out for HSE start up, in ms */
+#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
 #endif                           /* HSE_STARTUP_TIMEOUT */
 
 /**
  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
+ *        This value is used by the RCC HAL module to compute the system
-  *        (when HSI is used as system clock source, directly or through the PLL). 
+ * frequency (when HSI is used as system clock source, directly or through the
+ * PLL).
  */
-#if !defined  (HSI_VALUE)
+#if !defined(HSI_VALUE)
-  #define HSI_VALUE              16000000U /*!< Value of the Internal oscillator in Hz */
+#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz */
 #endif                      /* HSI_VALUE */
 
 /**
  * @brief Internal Low Speed oscillator (LSI) value.
  */
-#if !defined  (LSI_VALUE) 
+#if !defined(LSI_VALUE)
- #define LSI_VALUE               32000U    /*!< LSI Typical Value in Hz */
+#define LSI_VALUE 32000U /*!< LSI Typical Value in Hz */
-#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz
+#endif /* LSI_VALUE */   /*!< Value of the Internal Low Speed oscillator in Hz \
-                                                The real value may vary depending on the variations
+                              The real value may vary depending on the         \
-                                                in voltage and temperature. */
+                            variations   in voltage and temperature. */
 /**
  * @brief External Low Speed oscillator (LSE) value.
  */
-#if !defined  (LSE_VALUE)
+#if !defined(LSE_VALUE)
- #define LSE_VALUE               32768U    /*!< Value of the External Low Speed oscillator in Hz */
+#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */
 #endif                   /* LSE_VALUE */
 
-#if !defined  (LSE_STARTUP_TIMEOUT)
+#if !defined(LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    5000U     /*!< Time out for LSE start up, in ms */
+#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
 #endif                            /* LSE_STARTUP_TIMEOUT */
 
 /**
  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source 
+ *        This value is used by the I2S HAL module to compute the I2S clock
-  *        frequency, this source is inserted directly through I2S_CKIN pad. 
+ * source frequency, this source is inserted directly through I2S_CKIN pad.
  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
+#if !defined(EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE     12288000U /*!< Value of the External oscillator in Hz*/
+#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/
 #endif                                 /* EXTERNAL_CLOCK_VALUE */
 
 /* Tip: To avoid modifying this file each time you need to use different HSE,
@@ -227,46 +229,46 @@
 
 /* Section 3: Common PHY Registers */
 
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
+#define PHY_BCR ((uint16_t) 0x0000) /*!< Transceiver Basic Control Register */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
+#define PHY_BSR ((uint16_t) 0x0001) /*!< Transceiver Basic Status Register */
 
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
+#define PHY_RESET ((uint16_t) 0x8000)                   /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
+#define PHY_LOOPBACK ((uint16_t) 0x4000)                /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_100M ((uint16_t) 0x2100)         /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M ((uint16_t) 0x2000)         /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_FULLDUPLEX_10M ((uint16_t) 0x0100)          /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M ((uint16_t) 0x0000)          /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
+#define PHY_AUTONEGOTIATION ((uint16_t) 0x1000)         /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
+#define PHY_RESTART_AUTONEGOTIATION ((uint16_t) 0x0200) /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
+#define PHY_POWERDOWN ((uint16_t) 0x0800)               /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
+#define PHY_ISOLATE ((uint16_t) 0x0400)                 /*!< Isolate PHY from MII                 */
 
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
+#define PHY_AUTONEGO_COMPLETE ((uint16_t) 0x0020) /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
+#define PHY_LINKED_STATUS ((uint16_t) 0x0004)     /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
+#define PHY_JABBER_DETECTION ((uint16_t) 0x0002)  /*!< Jabber condition detected            */
 
 /* Section 4: Extended PHY Registers */
 
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
+#define PHY_SR ((uint16_t) 0x0010)   /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
+#define PHY_MICR ((uint16_t) 0x0011) /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
+#define PHY_MISR ((uint16_t) 0x0012) /*!< MII Interrupt Status and Misc. Control Register */
 
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
+#define PHY_LINK_STATUS ((uint16_t) 0x0001)   /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
+#define PHY_SPEED_STATUS ((uint16_t) 0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
+#define PHY_DUPLEX_STATUS ((uint16_t) 0x0004) /*!< PHY Duplex mask                                 */
 
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
+#define PHY_MICR_INT_EN ((uint16_t) 0x0002) /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
+#define PHY_MICR_INT_OE ((uint16_t) 0x0001) /*!< PHY Enable output interrupt events              */
 
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
+#define PHY_MISR_LINK_INT_EN ((uint16_t) 0x0020) /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
+#define PHY_LINK_INTERRUPT ((uint16_t) 0x2000)   /*!< PHY link status interrupt mask                  */
 
 /* ################## SPI peripheral configuration ########################## */
 
 /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
+ * Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
+ * Deactivated: CRC code cleaned from driver
-*/
+ */
 
 #define USE_SPI_CRC 1U
 
@@ -276,195 +278,195 @@
  */
 
 #ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
+#include "stm32f4xx_hal_rcc.h"
 #endif /* HAL_RCC_MODULE_ENABLED */
 
 #ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
+#include "stm32f4xx_hal_gpio.h"
 #endif /* HAL_GPIO_MODULE_ENABLED */
 
 #ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
+#include "stm32f4xx_hal_exti.h"
 #endif /* HAL_EXTI_MODULE_ENABLED */
 
 #ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
+#include "stm32f4xx_hal_dma.h"
 #endif /* HAL_DMA_MODULE_ENABLED */
 
 #ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
+#include "stm32f4xx_hal_cortex.h"
 #endif /* HAL_CORTEX_MODULE_ENABLED */
 
 #ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
+#include "stm32f4xx_hal_adc.h"
 #endif /* HAL_ADC_MODULE_ENABLED */
 
 #ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
+#include "stm32f4xx_hal_can.h"
 #endif /* HAL_CAN_MODULE_ENABLED */
 
 #ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
+#include "stm32f4xx_hal_can_legacy.h"
 #endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
 
 #ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
+#include "stm32f4xx_hal_crc.h"
 #endif /* HAL_CRC_MODULE_ENABLED */
 
 #ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h" 
+#include "stm32f4xx_hal_cryp.h"
 #endif /* HAL_CRYP_MODULE_ENABLED */
 
 #ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
+#include "stm32f4xx_hal_dma2d.h"
 #endif /* HAL_DMA2D_MODULE_ENABLED */
 
 #ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
+#include "stm32f4xx_hal_dac.h"
 #endif /* HAL_DAC_MODULE_ENABLED */
 
 #ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
+#include "stm32f4xx_hal_dcmi.h"
 #endif /* HAL_DCMI_MODULE_ENABLED */
 
 #ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
+#include "stm32f4xx_hal_eth.h"
 #endif /* HAL_ETH_MODULE_ENABLED */
 
 #ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
+#include "stm32f4xx_hal_flash.h"
 #endif /* HAL_FLASH_MODULE_ENABLED */
 
 #ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
+#include "stm32f4xx_hal_sram.h"
 #endif /* HAL_SRAM_MODULE_ENABLED */
 
 #ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
+#include "stm32f4xx_hal_nor.h"
 #endif /* HAL_NOR_MODULE_ENABLED */
 
 #ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
+#include "stm32f4xx_hal_nand.h"
 #endif /* HAL_NAND_MODULE_ENABLED */
 
 #ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
+#include "stm32f4xx_hal_pccard.h"
 #endif /* HAL_PCCARD_MODULE_ENABLED */
 
 #ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
+#include "stm32f4xx_hal_sdram.h"
 #endif /* HAL_SDRAM_MODULE_ENABLED */
 
 #ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
+#include "stm32f4xx_hal_hash.h"
 #endif /* HAL_HASH_MODULE_ENABLED */
 
 #ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
+#include "stm32f4xx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
 #ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
+#include "stm32f4xx_hal_smbus.h"
 #endif /* HAL_SMBUS_MODULE_ENABLED */
 
 #ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
+#include "stm32f4xx_hal_i2s.h"
 #endif /* HAL_I2S_MODULE_ENABLED */
 
 #ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
+#include "stm32f4xx_hal_iwdg.h"
 #endif /* HAL_IWDG_MODULE_ENABLED */
 
 #ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
+#include "stm32f4xx_hal_ltdc.h"
 #endif /* HAL_LTDC_MODULE_ENABLED */
 
 #ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
+#include "stm32f4xx_hal_pwr.h"
 #endif /* HAL_PWR_MODULE_ENABLED */
 
 #ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
+#include "stm32f4xx_hal_rng.h"
 #endif /* HAL_RNG_MODULE_ENABLED */
 
 #ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
+#include "stm32f4xx_hal_rtc.h"
 #endif /* HAL_RTC_MODULE_ENABLED */
 
 #ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
+#include "stm32f4xx_hal_sai.h"
 #endif /* HAL_SAI_MODULE_ENABLED */
 
 #ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
+#include "stm32f4xx_hal_sd.h"
 #endif /* HAL_SD_MODULE_ENABLED */
 
 #ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
+#include "stm32f4xx_hal_spi.h"
 #endif /* HAL_SPI_MODULE_ENABLED */
 
 #ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
+#include "stm32f4xx_hal_tim.h"
 #endif /* HAL_TIM_MODULE_ENABLED */
 
 #ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
+#include "stm32f4xx_hal_uart.h"
 #endif /* HAL_UART_MODULE_ENABLED */
 
 #ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
+#include "stm32f4xx_hal_usart.h"
 #endif /* HAL_USART_MODULE_ENABLED */
 
 #ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
+#include "stm32f4xx_hal_irda.h"
 #endif /* HAL_IRDA_MODULE_ENABLED */
 
 #ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
+#include "stm32f4xx_hal_smartcard.h"
 #endif /* HAL_SMARTCARD_MODULE_ENABLED */
 
 #ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
+#include "stm32f4xx_hal_wwdg.h"
 #endif /* HAL_WWDG_MODULE_ENABLED */
 
 #ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
+#include "stm32f4xx_hal_pcd.h"
 #endif /* HAL_PCD_MODULE_ENABLED */
 
 #ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
+#include "stm32f4xx_hal_hcd.h"
 #endif /* HAL_HCD_MODULE_ENABLED */
 
 #ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
+#include "stm32f4xx_hal_dsi.h"
 #endif /* HAL_DSI_MODULE_ENABLED */
 
 #ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
+#include "stm32f4xx_hal_qspi.h"
 #endif /* HAL_QSPI_MODULE_ENABLED */
 
 #ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
+#include "stm32f4xx_hal_cec.h"
 #endif /* HAL_CEC_MODULE_ENABLED */
 
 #ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
+#include "stm32f4xx_hal_fmpi2c.h"
 #endif /* HAL_FMPI2C_MODULE_ENABLED */
 
 #ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
+#include "stm32f4xx_hal_spdifrx.h"
 #endif /* HAL_SPDIFRX_MODULE_ENABLED */
 
 #ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
+#include "stm32f4xx_hal_dfsdm.h"
 #endif /* HAL_DFSDM_MODULE_ENABLED */
 
 #ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
+#include "stm32f4xx_hal_lptim.h"
 #endif /* HAL_LPTIM_MODULE_ENABLED */
 
 #ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
+#include "stm32f4xx_hal_mmc.h"
 #endif /* HAL_MMC_MODULE_ENABLED */
 
 /* Exported macro ------------------------------------------------------------*/
@@ -477,19 +479,17 @@
  *         If expr is true, it returns no value.
  * @retval None
  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+#define assert_param(expr) ((expr) ? (void) 0U : assert_failed((uint8_t*) __FILE__, __LINE__))
 /* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
+void assert_failed(uint8_t* file, uint32_t line);
 #else
-  #define assert_param(expr) ((void)0U)
+#define assert_param(expr) ((void) 0U)
 #endif /* USE_FULL_ASSERT */
 
-
 #ifdef __cplusplus
 }
 #endif
 
 #endif /* __STM32F4xx_HAL_CONF_H */
 
-
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/