diff --git a/.clang-format b/.clang-format index f7b0192..8eb573a 100644 --- a/.clang-format +++ b/.clang-format @@ -1,7 +1,7 @@ BasedOnStyle: LLVM AccessModifierOffset: -4 AlignAfterOpenBracket: Align -AlignConsecutiveAssignments: None +AlignConsecutiveAssignments: false AlignOperands: Align AllowAllArgumentsOnNextLine: false AllowAllConstructorInitializersOnNextLine: false diff --git a/examples/stm32/FreeRTOSConfig.h b/examples/stm32/FreeRTOSConfig.h index 70c6841..55f62d3 100644 --- a/examples/stm32/FreeRTOSConfig.h +++ b/examples/stm32/FreeRTOSConfig.h @@ -47,7 +47,7 @@ extern uint32_t SystemCoreClock; #if defined STM32L5 #define configENABLE_TRUSTZONE 0 #if configENABLE_TRUSTZONE -#define configMINIMAL_SECURE_STACK_SIZE ((uint16_t)1024) +#define configMINIMAL_SECURE_STACK_SIZE ((uint16_t) 1024) #endif #define configRUN_FREERTOS_SECURE_ONLY 0 #define configENABLE_FPU 1 @@ -58,11 +58,11 @@ extern uint32_t SystemCoreClock; #define configUSE_IDLE_HOOK 0 #define configUSE_TICK_HOOK 0 #define configCPU_CLOCK_HZ (SystemCoreClock) -#define configTICK_RATE_HZ ((TickType_t)1000) +#define configTICK_RATE_HZ ((TickType_t) 1000) #if !defined USE_CMSIS_RTOS_V2 #define configMAX_PRIORITIES (5) #endif -#define configMINIMAL_STACK_SIZE ((unsigned short)50) +#define configMINIMAL_STACK_SIZE ((unsigned short) 50) #define configTOTAL_HEAP_SIZE ((size_t)(32 * 1024)) #define configMAX_TASK_NAME_LEN (10) #define configUSE_TRACE_FACILITY 1 @@ -137,21 +137,19 @@ PRIORITY THAN THIS! (higher priorities are lower numeric values. */ /* Interrupt priorities used by the kernel port layer itself. These are generic to all Cortex-M ports, and do not rely on any particular library functions. */ -#define configKERNEL_INTERRUPT_PRIORITY \ - (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +#define configKERNEL_INTERRUPT_PRIORITY (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) /* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ -#define configMAX_SYSCALL_INTERRUPT_PRIORITY \ - (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) +#define configMAX_SYSCALL_INTERRUPT_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS)) /* Normal assert() semantics without relying on the provision of an assert.h header file. */ -#define configASSERT(x) \ - if ((x) == 0) { \ - taskDISABLE_INTERRUPTS(); \ - for (;;) \ - ; \ - } +#define configASSERT(x) \ + if ((x) == 0) { \ + taskDISABLE_INTERRUPTS(); \ + for (;;) \ + ; \ + } /* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS standard names. */ diff --git a/examples/stm32/bsp/blackpill/blackpill.c b/examples/stm32/bsp/blackpill/blackpill.c index 25402db..22c02b4 100644 --- a/examples/stm32/bsp/blackpill/blackpill.c +++ b/examples/stm32/bsp/blackpill/blackpill.c @@ -109,270 +109,275 @@ DMA_HandleTypeDef hdma_usart1_tx; DMA_HandleTypeDef hdma_usart1_rx; void BSP_Init(void) { - // Initialize the HAL Library - HAL_Init(); + // Initialize the HAL Library + HAL_Init(); - // Configure the system clock - SystemClock_Config(); + // Configure the system clock + SystemClock_Config(); - // Initialize all configured peripherals (GPIO and SPI1) - MX_GPIO_Init(); - MX_SPI1_Init(); - MX_DMA_Init(); - MX_USART1_UART_Init(); + // Initialize all configured peripherals (GPIO and SPI1) + MX_GPIO_Init(); + MX_SPI1_Init(); + MX_DMA_Init(); + MX_USART1_UART_Init(); } void SystemClock_Config(void) { - // System Clock Configuration Code - RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + // System Clock Configuration Code + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - // Configure the main internal regulator output voltage - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_ON; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 25; - RCC_OscInitStruct.PLL.PLLN = 336; - RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; - RCC_OscInitStruct.PLL.PLLQ = 7; - HAL_RCC_OscConfig(&RCC_OscInitStruct); + // Configure the main internal regulator output voltage + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 25; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + RCC_OscInitStruct.PLL.PLLQ = 7; + HAL_RCC_OscConfig(&RCC_OscInitStruct); - // Initialize the CPU, AHB, and APB buses clocks - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | - RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + // Initialize the CPU, AHB, and APB buses clocks + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); } static void MX_GPIO_Init(void) { - GPIO_InitTypeDef GPIO_InitStruct = {0}; + GPIO_InitTypeDef GPIO_InitStruct = {0}; - // Enable GPIOC clock - __HAL_RCC_GPIOC_CLK_ENABLE(); + // Enable GPIOC clock + __HAL_RCC_GPIOC_CLK_ENABLE(); - // Configure GPIOC Pin 13 for LED output (Output Push Pull mode) - GPIO_InitStruct.Pin = GPIO_PIN_13; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + // Configure GPIOC Pin 13 for LED output (Output Push Pull mode) + GPIO_InitStruct.Pin = GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - // Enable GPIOB clock - __HAL_RCC_GPIOB_CLK_ENABLE(); + // Enable GPIOB clock + __HAL_RCC_GPIOB_CLK_ENABLE(); - // Configure GPIOB Pin 7 as input for interrupt (Input mode) - GPIO_InitStruct.Pin = GPIO_PIN_7; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + // Configure GPIOB Pin 7 as input for interrupt (Input mode) + GPIO_InitStruct.Pin = GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - // Configure GPIOB Pin 6 as output with Open Drain mode - GPIO_InitStruct.Pin = GPIO_PIN_6; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + // Configure GPIOB Pin 6 as output with Open Drain mode + GPIO_InitStruct.Pin = GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET); - // Enable GPIOA clock - __HAL_RCC_GPIOA_CLK_ENABLE(); - // Configure NSS pin (PA15) as Output Push Pull - GPIO_InitStruct.Pin = GPIO_PIN_15; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + // Enable GPIOA clock + __HAL_RCC_GPIOA_CLK_ENABLE(); + // Configure NSS pin (PA15) as Output Push Pull + GPIO_InitStruct.Pin = GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); } static void MX_USART1_UART_Init(void) { - // USART1 initialization settings - __HAL_RCC_USART1_CLK_ENABLE(); + // USART1 initialization settings + __HAL_RCC_USART1_CLK_ENABLE(); - huart1.Instance = USART1; - huart1.Init.BaudRate = 115200; - huart1.Init.WordLength = UART_WORDLENGTH_8B; - huart1.Init.StopBits = UART_STOPBITS_1; - huart1.Init.Parity = UART_PARITY_NONE; - huart1.Init.Mode = UART_MODE_TX_RX; - huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart1) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + if (HAL_UART_Init(&huart1) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - // Enable USART1 interrupt - // It must higher or equal than 5 - HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(USART1_IRQn); + // Enable USART1 interrupt + // It must higher or equal than 5 + HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(USART1_IRQn); - // USART1 Pin configuration: TX (PA9), RX (PA10) - GPIO_InitTypeDef GPIO_InitStruct = {0}; + // USART1 Pin configuration: TX (PA9), RX (PA10) + GPIO_InitTypeDef GPIO_InitStruct = {0}; - // Enable GPIOA clock - __HAL_RCC_GPIOA_CLK_ENABLE(); + // Enable GPIOA clock + __HAL_RCC_GPIOA_CLK_ENABLE(); - // Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push - // Pull - GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART1; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + // Configure USART1 TX (PA9) and RX (PA10) pins as Alternate Function Push + // Pull + GPIO_InitStruct.Pin = GPIO_PIN_9 | GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); } static void MX_SPI1_Init(void) { - __HAL_RCC_SPI1_CLK_ENABLE(); - // SPI1 initialization settings - hspi1.Instance = SPI1; - hspi1.Init.Mode = SPI_MODE_MASTER; // Set SPI1 as master - hspi1.Init.Direction = SPI_DIRECTION_2LINES; // Set bidirectional data mode - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; // Set data frame size to 8 bits - hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; // Clock polarity low when idle - hspi1.Init.CLKPhase = - SPI_PHASE_1EDGE; // First clock transition is the first data capture edge - hspi1.Init.NSS = SPI_NSS_SOFT; // Hardware chip select management - hspi1.Init.BaudRatePrescaler = - SPI_BAUDRATEPRESCALER_2; // Set baud rate prescaler to 2 - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; // Data is transmitted MSB first - hspi1.Init.TIMode = SPI_TIMODE_DISABLE; // Disable TI mode - hspi1.Init.CRCCalculation = - SPI_CRCCALCULATION_DISABLE; // Disable CRC calculation - hspi1.Init.CRCPolynomial = 10; // CRC polynomial value + __HAL_RCC_SPI1_CLK_ENABLE(); + // SPI1 initialization settings + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; // Set SPI1 as master + hspi1.Init.Direction = SPI_DIRECTION_2LINES; // Set bidirectional data mode + hspi1.Init.DataSize = SPI_DATASIZE_8BIT; // Set data frame size to 8 bits + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; // Clock polarity low when idle + hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; // First clock transition is the first data capture edge + hspi1.Init.NSS = SPI_NSS_SOFT; // Hardware chip select management + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; // Set baud rate prescaler to 2 + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; // Data is transmitted MSB first + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; // Disable TI mode + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; // Disable CRC calculation + hspi1.Init.CRCPolynomial = 10; // CRC polynomial value - if (HAL_SPI_Init(&hspi1) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + if (HAL_SPI_Init(&hspi1) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - // SPI1 Pin configuration: SCLK (PB3), MISO (PB4), MOSI (PB5) - GPIO_InitTypeDef GPIO_InitStruct = {0}; + // SPI1 Pin configuration: SCLK (PB3), MISO (PB4), MOSI (PB5) + GPIO_InitTypeDef GPIO_InitStruct = {0}; - // Enable GPIOB clock - __HAL_RCC_GPIOB_CLK_ENABLE(); + // Enable GPIOB clock + __HAL_RCC_GPIOB_CLK_ENABLE(); - // Configure SPI1 SCLK, MISO, MOSI pins as Alternate Function Push Pull - GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + // Configure SPI1 SCLK, MISO, MOSI pins as Alternate Function Push Pull + GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); } static void MX_DMA_Init(void) { - // DMA controller clock enable - __HAL_RCC_DMA2_CLK_ENABLE(); + // DMA controller clock enable + __HAL_RCC_DMA2_CLK_ENABLE(); - // Configure DMA request hdma_spi1_tx on DMA2_Stream3 - hdma_spi1_tx.Instance = DMA2_Stream3; - hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3; - hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_spi1_tx.Init.Mode = DMA_NORMAL; - hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW; - hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + // Configure DMA request hdma_spi1_tx on DMA2_Stream3 + hdma_spi1_tx.Instance = DMA2_Stream3; + hdma_spi1_tx.Init.Channel = DMA_CHANNEL_3; + hdma_spi1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_spi1_tx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_spi1_tx.Init.MemInc = DMA_MINC_ENABLE; + hdma_spi1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_spi1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_spi1_tx.Init.Mode = DMA_NORMAL; + hdma_spi1_tx.Init.Priority = DMA_PRIORITY_LOW; + hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_spi1_tx) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - __HAL_LINKDMA(&hspi1, hdmatx, hdma_spi1_tx); + __HAL_LINKDMA(&hspi1, hdmatx, hdma_spi1_tx); - // Configure DMA request hdma_spi1_rx on DMA2_Stream0 - hdma_spi1_rx.Instance = DMA2_Stream0; - hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3; - hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_spi1_rx.Init.Mode = DMA_NORMAL; - hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH; - hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + // Configure DMA request hdma_spi1_rx on DMA2_Stream0 + hdma_spi1_rx.Instance = DMA2_Stream0; + hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3; + hdma_spi1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_spi1_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_spi1_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_spi1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_spi1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_spi1_rx.Init.Mode = DMA_NORMAL; + hdma_spi1_rx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_spi1_rx) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - __HAL_LINKDMA(&hspi1, hdmarx, hdma_spi1_rx); + __HAL_LINKDMA(&hspi1, hdmarx, hdma_spi1_rx); - // Configure DMA request hdma_usart1_tx on DMA2_Stream7 - hdma_usart1_tx.Instance = DMA2_Stream7; - hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; - hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart1_tx.Init.Mode = DMA_NORMAL; - hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + // Configure DMA request hdma_usart1_tx on DMA2_Stream7 + hdma_usart1_tx.Instance = DMA2_Stream7; + hdma_usart1_tx.Init.Channel = DMA_CHANNEL_4; + hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart1_tx.Init.Mode = DMA_NORMAL; + hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - __HAL_LINKDMA(&huart1, hdmatx, hdma_usart1_tx); + __HAL_LINKDMA(&huart1, hdmatx, hdma_usart1_tx); - // Configure DMA request hdma_usart1_rx on DMA2_Stream2 - hdma_usart1_rx.Instance = DMA2_Stream2; - hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; - hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart1_rx.Init.Mode = DMA_NORMAL; - hdma_usart1_rx.Init.Priority = DMA_PRIORITY_HIGH; - hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + // Configure DMA request hdma_usart1_rx on DMA2_Stream2 + hdma_usart1_rx.Instance = DMA2_Stream2; + hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; + hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart1_rx.Init.Mode = DMA_NORMAL; + hdma_usart1_rx.Init.Priority = DMA_PRIORITY_HIGH; + hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) { - // Initialization error handling - Error_Handler(); - } + if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) { + // Initialization error handling + Error_Handler(); + } - __HAL_LINKDMA(&huart1, hdmarx, hdma_usart1_rx); + __HAL_LINKDMA(&huart1, hdmarx, hdma_usart1_rx); - // DMA2_Stream3 (SPI1_TX) Interrupt Configuration - HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); + // DMA2_Stream3 (SPI1_TX) Interrupt Configuration + HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); - // DMA2_Stream0 (SPI1_RX) Interrupt Configuration - HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); + // DMA2_Stream0 (SPI1_RX) Interrupt Configuration + HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn); - // DMA2_Stream7 (USART1_TX) Interrupt Configuration - HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + // DMA2_Stream7 (USART1_TX) Interrupt Configuration + HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - // DMA2_Stream2 (USART1_RX) Interrupt Configuration - HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); + // DMA2_Stream2 (USART1_RX) Interrupt Configuration + HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); } void Error_Handler(void) { - // If an error occurs, stay in infinite loop - while (1) { - } + // If an error occurs, stay in infinite loop + while (1) {} } -void DMA2_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_spi1_tx); } +void DMA2_Stream3_IRQHandler(void) { + HAL_DMA_IRQHandler(&hdma_spi1_tx); +} -void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_spi1_rx); } +void DMA2_Stream0_IRQHandler(void) { + HAL_DMA_IRQHandler(&hdma_spi1_rx); +} -void DMA2_Stream7_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_usart1_tx); } +void DMA2_Stream7_IRQHandler(void) { + HAL_DMA_IRQHandler(&hdma_usart1_tx); +} -void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma_usart1_rx); } +void DMA2_Stream2_IRQHandler(void) { + HAL_DMA_IRQHandler(&hdma_usart1_rx); +} -void USART1_IRQHandler(void) { HAL_UART_IRQHandler(&huart1); } +void USART1_IRQHandler(void) { + HAL_UART_IRQHandler(&huart1); +} diff --git a/examples/stm32/stm32f4xx_hal_conf.h b/examples/stm32/stm32f4xx_hal_conf.h index bf7e9f1..f0cf1fb 100644 --- a/examples/stm32/stm32f4xx_hal_conf.h +++ b/examples/stm32/stm32f4xx_hal_conf.h @@ -121,9 +121,8 @@ extern "C" { * @brief External Low Speed oscillator (LSE) value. */ #if !defined(LSE_VALUE) -#define LSE_VALUE \ - 32768U /*!< Value of the External Low Speed oscillator in Hz */ -#endif /* LSE_VALUE */ +#define LSE_VALUE 32768U /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ #if !defined(LSE_STARTUP_TIMEOUT) #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */ @@ -135,9 +134,8 @@ extern "C" { * source frequency, this source is inserted directly through I2S_CKIN pad. */ #if !defined(EXTERNAL_CLOCK_VALUE) -#define EXTERNAL_CLOCK_VALUE \ - 12288000U /*!< Value of the External oscillator in Hz*/ -#endif /* EXTERNAL_CLOCK_VALUE */ +#define EXTERNAL_CLOCK_VALUE 12288000U /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ /* Tip: To avoid modifying this file each time you need to use different HSE, === you can define the HSE value in your toolchain compiler preprocessor. */ @@ -153,82 +151,44 @@ extern "C" { #define INSTRUCTION_CACHE_ENABLE 1U #define DATA_CACHE_ENABLE 1U -#define USE_HAL_ADC_REGISTER_CALLBACKS \ - 0U /* ADC register callback disabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS \ - 0U /* CAN register callback disabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS \ - 0U /* CEC register callback disabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS \ - 0U /* CRYP register callback disabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS \ - 0U /* DAC register callback disabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS \ - 0U /* DCMI register callback disabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS \ - 0U /* DFSDM register callback disabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS \ - 0U /* DMA2D register callback disabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS \ - 0U /* DSI register callback disabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS \ - 0U /* ETH register callback disabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS \ - 0U /* HASH register callback disabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS \ - 0U /* HCD register callback disabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS \ - 0U /* I2C register callback disabled */ -#define USE_HAL_FMPI2C_REGISTER_CALLBACKS \ - 0U /* FMPI2C register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS \ - 0U /* I2S register callback disabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS \ - 0U /* IRDA register callback disabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS \ - 0U /* LPTIM register callback disabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS \ - 0U /* LTDC register callback disabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS \ - 0U /* MMC register callback disabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS \ - 0U /* NAND register callback disabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS \ - 0U /* NOR register callback disabled */ -#define USE_HAL_PCCARD_REGISTER_CALLBACKS \ - 0U /* PCCARD register callback disabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS \ - 0U /* PCD register callback disabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS \ - 0U /* QSPI register callback disabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS \ - 0U /* RNG register callback disabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS \ - 0U /* RTC register callback disabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS \ - 0U /* SAI register callback disabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS \ - 0U /* SD register callback disabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS \ - 0U /* SMARTCARD register callback disabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS \ - 0U /* SDRAM register callback disabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS \ - 0U /* SRAM register callback disabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS \ - 0U /* SPDIFRX register callback disabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS \ - 0U /* SMBUS register callback disabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS \ - 0U /* SPI register callback disabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS \ - 0U /* TIM register callback disabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS \ - 0U /* UART register callback disabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS \ - 0U /* USART register callback disabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS \ - 0U /* WWDG register callback disabled */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ /* ########################## Assert Selection ############################## */ /** @@ -250,12 +210,10 @@ extern "C" { #define MAC_ADDR5 0U /* Definition of the Ethernet driver buffers size and count */ -#define ETH_RX_BUF_SIZE \ - ETH_MAX_PACKET_SIZE /* buffer size for receive */ -#define ETH_TX_BUF_SIZE \ - ETH_MAX_PACKET_SIZE /* buffer size for transmit */ -#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ -#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB 4U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ /* Section 2: PHY configuration section */ @@ -271,60 +229,39 @@ extern "C" { /* Section 3: Common PHY Registers */ -#define PHY_BCR ((uint16_t)0x0000) /*!< Transceiver Basic Control Register */ -#define PHY_BSR ((uint16_t)0x0001) /*!< Transceiver Basic Status Register */ +#define PHY_BCR ((uint16_t) 0x0000) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t) 0x0001) /*!< Transceiver Basic Status Register */ -#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ -#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ -#define PHY_FULLDUPLEX_100M \ - ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ -#define PHY_HALFDUPLEX_100M \ - ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ -#define PHY_FULLDUPLEX_10M \ - ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ -#define PHY_HALFDUPLEX_10M \ - ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ -#define PHY_AUTONEGOTIATION \ - ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ -#define PHY_RESTART_AUTONEGOTIATION \ - ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ -#define PHY_POWERDOWN \ - ((uint16_t)0x0800) /*!< Select the power down mode */ -#define PHY_ISOLATE \ - ((uint16_t)0x0400) /*!< Isolate PHY from MII */ +#define PHY_RESET ((uint16_t) 0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t) 0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t) 0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t) 0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t) 0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t) 0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t) 0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t) 0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t) 0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t) 0x0400) /*!< Isolate PHY from MII */ -#define PHY_AUTONEGO_COMPLETE \ - ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ -#define PHY_LINKED_STATUS \ - ((uint16_t)0x0004) /*!< Valid link established */ -#define PHY_JABBER_DETECTION \ - ((uint16_t)0x0002) /*!< Jabber condition detected */ +#define PHY_AUTONEGO_COMPLETE ((uint16_t) 0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t) 0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t) 0x0002) /*!< Jabber condition detected */ /* Section 4: Extended PHY Registers */ -#define PHY_SR \ - ((uint16_t)0x0010) /*!< PHY status register Offset */ -#define PHY_MICR \ - ((uint16_t)0x0011) /*!< MII Interrupt Control Register */ -#define PHY_MISR \ - ((uint16_t)0x0012) /*!< MII Interrupt Status and Misc. Control Register */ +#define PHY_SR ((uint16_t) 0x0010) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t) 0x0011) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t) 0x0012) /*!< MII Interrupt Status and Misc. Control Register */ -#define PHY_LINK_STATUS \ - ((uint16_t)0x0001) /*!< PHY Link mask */ -#define PHY_SPEED_STATUS \ - ((uint16_t)0x0002) /*!< PHY Speed mask */ -#define PHY_DUPLEX_STATUS \ - ((uint16_t)0x0004) /*!< PHY Duplex mask */ +#define PHY_LINK_STATUS ((uint16_t) 0x0001) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t) 0x0002) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t) 0x0004) /*!< PHY Duplex mask */ -#define PHY_MICR_INT_EN \ - ((uint16_t)0x0002) /*!< PHY Enable interrupts */ -#define PHY_MICR_INT_OE \ - ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */ +#define PHY_MICR_INT_EN ((uint16_t) 0x0002) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t) 0x0001) /*!< PHY Enable output interrupt events */ -#define PHY_MISR_LINK_INT_EN \ - ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */ -#define PHY_LINK_INTERRUPT \ - ((uint16_t)0x2000) /*!< PHY link status interrupt mask */ +#define PHY_MISR_LINK_INT_EN ((uint16_t) 0x0020) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t) 0x2000) /*!< PHY link status interrupt mask */ /* ################## SPI peripheral configuration ########################## */ @@ -542,12 +479,11 @@ extern "C" { * If expr is true, it returns no value. * @retval None */ -#define assert_param(expr) \ - ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +#define assert_param(expr) ((expr) ? (void) 0U : assert_failed((uint8_t*) __FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); +void assert_failed(uint8_t* file, uint32_t line); #else -#define assert_param(expr) ((void)0U) +#define assert_param(expr) ((void) 0U) #endif /* USE_FULL_ASSERT */ #ifdef __cplusplus